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WS128K32V-XXX
128Kx32 3.3V SRAM MULTICHIP PACKAGE
FEATURES
s Access Times of 15**, 17, 20, 25, 35ns s Low Voltage Operation s Packaging * 66-pin, PGA Type, 1.075 inch square Hermetic Ceramic HIP (Package 400) * 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880 inch) square (Package 509), 4.57mm (0.180 inch) high. Designed to fit JEDEC 68 lead 0.990" CQFJ footprint (Fig. 2) * 68 lead, Hermetic CQFP (G1U), 23.8mm (0.940 inch) square (Package 509), 3.56mm (0.140 inch) high. s Organized as 128Kx32; User Configurable as 256Kx16 or 512Kx8 s Commercial, Industrial and Military Temperature Ranges
PRELIMINARY*
s 3.3 Volt Power Supply s Low Power CMOS s TTL Compatible Inputs and Outputs s Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation s Weight WS128K32V-XG2TX - 8 grams typical WS128K32V-XG1UX - 5 grams typical WS128K32V-XH1X - 13 grams typical
* This data sheet describes a product that is not fully qualified or characterized and is subject ot change without notice.
** Commercial and Industrial temperature ranges only.
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SRAM MODULES
FIG. 1
1 I/O8 I/O9 I/O10 A13 A14 A15 A16 NC I/O0 I/O1 I/O2 11
PIN CONFIGURATION FOR WS128K32NV-XH1X TOP VIEW
12 WE2 CS2 GND I/O11 A10 A11 A12 VCC CS1 NC I/O3 22 33 23 I/O15 I/O14 I/O13 I/O12 OE NC WE1 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A6 A7 NC A8 A9 I/O16 I/O17 I/O18 44 34 VCC CS4 WE4 I/O27 A3 A4 A5 WE3 CS3 GND I/O19 55 45 I/O31 I/O30 I/O29 I/O28 A0 A1 A2
WE1 CS 1
PIN DESCRIPTION
56
I/O0-31 A0-16 WE1-4 CS1-4 OE VCC GND NC
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected
BLOCK DIAGRAM
WE2 CS2 WE3 CS 3 WE 4CS4 OE A0-16 128K x 8 128K x 8
I/O23 I/O22
128K x 8
128K x 8
I/O21 I/O20 66
I/O0-7 I/O8-15 I/O16-23 I/O24-31
8 8 8 8
April 2001 Rev. 2
1
White Microelectronics * (602) 437-1520 * www.whiteedc.com
WS128K32V-XXX
FIG. 2
PIN CONFIGURATION FOR WS128K32V-XG2TX AND WS128K32V-XG1UX TOP VIEW
NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 A0-16
I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
WE2 WE3 WE4 VCC OE CS2 NC A11 A12 A13 A14 A15 A16 CS1
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SRAM MODULES
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 NC NC NC
WE1-4 CS1-4 OE VCC GND NC
BLOCK DIAGRAM
WE1 CS 1 OE A0-16 128K x 8 128K x 8 WE2 CS2 WE3 CS 3 WE 4CS4
128K x 8
128K x 8
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White Microelectronics * Phoenix, AZ * (602) 437-1520
2
WS128K32V-XXX
ABSOLUTE MAXIMUM RATINGS
Parameter Operating Temperature Storage Temperature Signal Voltage Relative to GND Junction Temperature Supply Voltage Symbol TA TSTG VG TJ VCC -0.5 Min -55 -65 -0.5 Max +125 +150 4.6 150 5.5 Unit C C V C V CS H L L L OE X L X H X H L H
TRUTH TABLE
WE Mode Standby Read Write Out Disable Data I/O High Z Data Out Data In High Z Power Standby Active Active Active
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Low Voltage Symbol VCC VIH VIL Min 3.0 2.2 -0.3 Max 3.6 VCC + 0.3 +0.8 Unit V V V Parameter OE capacitance WE1-4 capacitance HIP (PGA) CQFP G2T/G1U CS1-4 capacitance Data I/O capacitance Address input capacitance
CAPACITANCE (TA = +25C)
Symbol COE CWE Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 20 CCS CI/O CAD VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 20 50 pF pF pF Max 50 Unit pF pF
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SRAM MODULES
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS (VCC = 3.3V 0.3V, VSS = 0V, TA = -55C to +125C)
Parameter Input Leakage Current Output Leakage Current Operating Supply Current (x 32 Mode) Standby Current Output Low Voltage Output High Voltage Sym ILI ILO ICC x 32 ISB VOL VOH Conditions Min VIN = GND to VCC CS = VIH, OE = VIH, VOUT = GND to VCC CS = VIL, OE = VIH, f = 5MHz CS = VIH, OE = VIH, f = 5MHz IOL = 8mA IOH = -4.0mA 2.4 Max 10 10 500 32 0.4 Units A A mA mA V V
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White Microelectronics * (602) 437-1520 * www.whiteedc.com
WS128K32V-XXX
AC CHARACTERISTICS (VCC = 3.3V, TA = -55C to +125C)
Parameter Read Cycle Read Cycle Time Address Access Time Output Hold from Address Change Chip Select Access Time Output Enable to Output Valid Chip Select to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z tRC tAA tOH tACS tOE tCLZ 1 tOLZ 1 tCHZ 1 tOHZ 1 5 5 8 8 0 15 10 5 5 9 9 Symbol -15* Min 15 15 0 17 11 5 5 10 10 Max -17 Min 17 17 0 20 12 5 5 12 12 Max -20 Min 20 20 0 25 15 5 5 15 15 Max Min 25 25 0 35 20 -25 Max -35 Min 35 35 Max ns ns ns ns ns ns ns ns ns Units
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SRAM MODULES
1. This parameter is guaranteed by design but not tested. * Commercial and Industrial only.
AC CHARACTERISTICS (VCC = 3.3V, TA = -55C to +125C)
Parameter Write Cycle Write Cycle Time Chip Select to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write Write Enable to Output in High Z Data Hold Time tWC tCW tAW tDW tWP tAS tAH tOW 1 tWHZ 1 tDH 0 Symbol -15* Min 15 13 13 10 13 0 0 5 8 0 Max -17 Min 17 14 14 11 14 0 0 5 9 0 Max -20 Min 20 15 15 12 15 0 0 5 10 0 Max -25 Min 25 20 20 15 20 0 0 5 10 0 Max -35 Min 35 30 30 18 30 0 0 5 15 Max ns ns ns ns ns ns ns ns ns ns Units
1. This parameter is guaranteed by design but not tested. * Commercial and Industrial only.
FIG. 3
AC TEST CIRCUIT
Current Source I OL
AC TEST CONDITIONS
Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level
D.U.T. VZ
Typ VIL = 0, VIH = 3.0 5 1.5 1.5
Unit V ns V V
1.5V
Output Timing Reference Level
C eff = 50 pf
(Bipolar Supply)
I OH Current Source
NOTES: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 . VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
White Microelectronics * Phoenix, AZ * (602) 437-1520
4
WS128K32V-XXX
FIG. 4
TIMING WAVEFORM - READ CYCLE
ADDRESS
tRC tAA
CS
tRC
ADDRESS
tACS tCLZ
OE
tCHZ
tAA tOH
DATA I/O
PREVIOUS DATA VALID DATA VALID
tOE tOLZ
DATA I/O
HIGH IMPEDANCE
tOHZ
DATA VALID
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
READ CYCLE 2 (WE = VIH)
FIG. 5
WRITE CYCLE - WE CONTROLLED
tWC
ADDRESS
4
SRAM MODULES
tAW tCW
CS
tAH
tAS
WE
tWP tOW tWHZ tDW tDH
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
FIG. 6
WRITE CYCLE - CS CONTROLLED
ADDRESS
tWC
WS32K32-XHX
tAS tAW tCW tAH
CS
tWP
WE
tDW
DATA I/O
DATA VALID
tDH
WRITE CYCLE 2, CS CONTROLLED
5
White Microelectronics * (602) 437-1520 * www.whiteedc.com
WS128K32V-XXX
PACKAGE 400:
66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) 0.25 (0.010) SQ
PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM
25.4 (1.0) TYP
4
SRAM MODULES
4.34 (0.171) MAX 3.81 (0.150) 0.13 (0.005) 2.54 (0.100) TYP 1.42 (0.056) 0.13 (0.005) 0.76 (0.030) 0.13 (0.005) 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Microelectronics * Phoenix, AZ * (602) 437-1520
6
WS128K32V-XXX
PACKAGE 509:
68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T)
25.15 (0.990) 0.26 (0.010) SQ 22.36 (0.880) 0.26 (0.010) SQ 4.57 (0.180) MAX 0.27 (0.011) 0.04 (0.002)
Pin 1
0.25 (0.010) REF
24.03 (0.946) 0.26 (0.010) 1 / 7 1.0 (0.040) 0.127 (0.005)
R 0.25 (0.010) 0.19 (0.007) 0.06 (0.002)
23.87 (0.940) REF
DETAIL A
1.27 (0.050) TYP 0.38 (0.015) 0.05 (0.002) SEE DETAIL "A"
4
SRAM MODULES
20.3 (0.800) REF
The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form.
0.940" TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 519:
68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U)
25.27 (0.995) 0.13 (0.005) SQ 23.88 (0.940) 0.25 (0.010) SQ 0.25 (0.010) 3.56 (0.140) MAX
0.61 (0.024) 0.15 (0.006)
0.84 (0.033) REF
DETAIL A
1.27 (0.050) 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF
SEE DETAIL "A"
The White 68 lead G1U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G1U has the TCE and lead inspection advantage of the CQFP form.
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
7
White Microelectronics * (602) 437-1520 * www.whiteedc.com
WS128K32V-XXX
ORDERING INFORMATION W S 128K 32 X V - XXX X X X
LEAD FINISH: Blank = Gold plated leads A = Solder dip leads DEVICE GRADE: M = Military Screened I = Industrial C = Commercial -55C to +125C -40C to +85C 0C to +70C
4
SRAM MODULES
White Microelectronics * Phoenix, AZ * (602) 437-1520
PACKAGE TYPE: H1 = Ceramic Hex-In-line Package, HIP (Package 400) G2T = 22.4mm CQFP (Package 509) G1U = 23.8mm Low Profile CQFP (Package 519) ACCESS TIME (ns) Low Voltage Supply 3.3V 10% IMPROVEMENT MARK: N = No Connect at pins 8, 21, 28, 39 in HIP for upgrade. ORGANIZATION, 128Kx32 User configurable as 256Kx16 or 512Kx8 SRAM WHITE ELECTRONIC DESIGNS CORP.
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